Dr. Stoyan Stoyanov

Background

Dr Stoyan Stoyanov is Reader in Computational Engineering at the University of Greenwich in UK. He is Head of the Computational Mechanics and Reliability Group. He received the MSc degree in applied mathematics from Sofia University in 1996 and obtained PhD degree in Optimisation Modelling for Microelectronics Product Design at University of Greenwich in 2004.
His research interests and expertise are in the development and application of modelling and simulation tools for numerical analysis of the performance and thermo-mechanical reliability of electronic products and microsystems, finite element analysis, physics-of-failure modelling, predictive analytics and machine learning, data-driven prognostics modelling, and automated design optimisation.
He is currently Principal Investigator on the UKRI-funded research project DAAP-PEM (EPSRC EP/W006642/1) and leads several industry-funded consultancy projects on assessing reliability performance of semiconductor packaging architectures in high-reliability applications. He has authored over 100 peer-reviewed publications.
Dr Stoyanov is a senior member of the IEEE, a member of the IEEE Electronics Packaging Society (EPS) and the steering committee of the IEEE International Spring Seminar on Electronics Technology (ISSE). He won best paper awards for his research in flip-chip, 3D printing and focal plane array technologies.

Selected Publications

• Y Xu, J Xian, S Stoyanov, C Bailey, R J Coyle, C M Gourlay, F P E Dunne, A multi-scale approach to microstructure-sensitive thermal fatigue in solder joints. International Journal of Plasticity, 155, 2022, 103308, doi: 10.1016/j.ijplas.2022.103308
• S Stoyanov, C Bailey, Deep learning modelling for composite properties of PCB conductive layers. IEEE EuroSimE, St Julian, Malta, 2022, 1-7, doi: 10.1109/EuroSimE54907.2022.9758885
• S Stoyanov, P Stewart, C Bailey, Reliability optimisation and lifetime modelling of micro-BGA assemblies in harsh environment applications. IEEE EMPC Conference, Gothenburg, Sweden, 2021, 1-8, doi: 10.23919/EMPC53418.2021.9584970
• T Tilford, S Stoyanov, J Braun, J C Janhsen, M K Patel, C Bailey, Comparative reliability of inkjet-printed electronics packaging. IEEE Transactions on CPMT, 11 (2), 2021, 351-362. doi: 10.1109/TCPMT.2021.3049952
• S Stoyanov, C Bailey, P Stewart, M Parker, J F Roulston, Experimental and modelling study on delamination risks for refinished electronic packages under hot solder dip loads. IEEE Transactions on CPMT, 10 (3), 2020, 502-515 (doi: 10.1109/TCPMT.2020.2972635)
• S Stoyanov, M Ahsan, C Bailey, T Wotherspoon, C Hunt, Predictive analytics methodology for smart qualification testing of electronic components. Journal of Intelligent Manufacturing, 30, 2019, 1497-1514, doi: 10.1007/s10845-018-01462-9
• S Stoyanov, C Bailey, G Tourloukis, Similarity approach for reducing qualification tests of electronic components. Microelectronics Reliability, 67, 2016, 111–119, doi: 10.1016/j.microrel.2016.10.017